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MDU Series ADCs
MDU Series High-Performance USB 2.0 Data Acquisition
Summary
Uses up to 10 4-channel
I/O modules
High-speed USB 2.0 interface streams up to 40 MB/s
Field-upgradeable FPGA functions
Simple register architecture
Expansion Port extends FPGA signals to external devices
I/O Customization
New I/O modules can be designed quickly
Add Expansion Port modules for signal translation, communications, or I/O expansion
FPGA Customization
New FPGA functions developed by AiT can be field-programmed over USB
Standardized Register Architecture
FPGA functions are accessed through 16-bit registers
Single and block transfers are supported
Software Support
Firmware updater and utilities
Microsoft Windows .NET driver and API
LabView VIs and pre-compiled applications
C# examples and pre-compiled applications
Supports 32-bit and 64-bit Windows OS
MDU20
MDU40
Standard Configuration for SiPM Arrays and Photomultipliers
16 or 32 simultaneous gated integrators with a 12-bit simultaneous sampling ADC per channel
Sustains trigger rates up to 1.2 MHz for 16 channels and 600 kHz for 32 channels
Connects directly to one or two
SiPMIM16
interface modules
16-Channel SiPM Interface Module (model: SiPMIM16)
Datasheet
:
SiPMIM16 Datasheet
20-Channel USB DAQ for SiPM Arrays & Photomultipliers (model: MDU20-GI16)
16-channel simultaneous gated integrators with PMT control
Controls one SiPMIM16 Interface Module
Up to 1.2 MHz trigger rate acquiring 16 channels
32KB event data FIFO
Programmable gate width, 10ns resolution
32-bit event count, 48-bit 10ns time stamp
100 ns analog delay per channel
Four input offset DACs
40-Channel USB DAQ for SiPM Arrays & Photomultipliers (model: MDU40-GI32)
32-channel simultaneous gated integrators with dual PMT control
Controls two SiPMIM16 Interface Modules
Up to 600 kHz trigger rate acquiring 32 channels
128KB event data FIFO
Programmable gate width, 10ns resolution
32-bit event count, 48-bit 10ns time stamp
100 ns analog delay per channel
Eight input offset DACs